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Verilog HDL Design Examples Joseph Cavanagh 第1 版本
Verilog HDL Design Examples
Joseph Cavanagh
The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating the design's functional operation.
655 pages, 698 Line drawings, black and white; 34 Tables, black and white
| 介质类型 | 图书 Hardcover Book (精装硬皮书) |
| 已发行 | 2017年10月13日 |
| ISBN13 | 9781138099951 |
| 出版商 | Taylor & Francis Ltd |
| 页数 | 674 |
| 商品尺寸 | 260 × 184 × 44 mm · 1,40 kg |
| 语言 | 英语 |
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